[ros-dev] Save FPU on task switch/SSE support

Gregor Anich blight at blight.eu.org
Tue Oct 12 21:36:44 CEST 2004


ShadowFlare wrote:

>--- Mike Nordell <tamlin at algonet.se> wrote:
>
>  
>
>>IIRC Win95 and NT4 knew nothing but plain FPU.
>>fxsave & co were introduced
>>with the introduction of WDM, in Win98 and NT5.
>>
>>/Mike
>>    
>>
>
>If that's the case, would running multiple programs
>that try to use these other types of instructions
>cause random crashes?
>
>-ShadowFlare
>  
>

If that was the case Intel would have broken backwards compatibility 
which they do not do usually I think... If an OS does not know about a 
feature, it does usually not enable it and the processor acts like it 
would without the feature in most cases I think. (since it's disabled ;-)

In cr4 (Control Register number 4) is a bit called OSFXSR which means 
"Operating System support for FXSAVE and FXRSTOR" - if it's not set SSE 
instructions are disabled.

 From the IA-32 manual:
"When set, this flag preforms the following functions: (1) indicates to 
software
that the operating system supports the use of the FXSAVE and FXRSTOR 
instructions,
(2) enables the FXSAVE and FXRSTOR instructions to save and restore the 
contents
of the XMM and MXCSR registers along with the contents of the x87 FPU 
and MMX
registers, and (3) enables the processor to execute any of the 
SSE/SSE2/SSE3 instruc-tions,
with the exception of the PAUSE, PREFETCHh, SFENCE, LFENCE,
MFENCE, MOVNTI, and CLFLUSH.
If this flag is clear, the FXSAVE and FXRSTOR instructions will save and 
restore the
contents of the x87 FPU and MMX instructions, but they may not save and 
restore the
contents of the XMM and MXCSR registers.
Also, if this flag is clear, the processor will generate an invalid 
opcode exception (#UD)
whenever it attempts to execute an SSE/SSE2/SSE3 instruction, with the 
exception of
the PAUSE, PREFETCHh, SFENCE, LFENCE, MFENCE, MOVNTI, and
CLFLUSH. The operating system or executive must explicitly set this flag."

You can get the PDFs at 
http://developer.intel.com/design/PentiumIII/documentation.htm#manuals 
(IA-32 Intel Architecture Software Developer’s Manual Volume 1, 2A, 2B, 3)



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