[ros-diffs] [ros-arm-bringup] 33940: - We now implement more proper context switching. - This fixes an issue where code was using PCR->CurrentThread but x86/shared routines use PRCB->CurrentThread. - Added a note to explain the difference, and we now set both. - We currently stop at Phase 1 HAL Initialization.

ros-arm-bringup at svn.reactos.org ros-arm-bringup at svn.reactos.org
Thu Jun 12 06:32:46 CEST 2008


Author: ros-arm-bringup
Date: Wed Jun 11 23:32:45 2008
New Revision: 33940

URL: http://svn.reactos.org/svn/reactos?rev=33940&view=rev
Log:
- We now implement more proper context switching.
- This fixes an issue where code was using PCR->CurrentThread but x86/shared routines use PRCB->CurrentThread.
- Added a note to explain the difference, and we now set both.
- We currently stop at Phase 1 HAL Initialization.

Modified:
    trunk/reactos/include/reactos/armddk.h
    trunk/reactos/ntoskrnl/ex/init.c
    trunk/reactos/ntoskrnl/ke/arm/trapc.c

Modified: trunk/reactos/include/reactos/armddk.h
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/include/reactos/armddk.h?rev=33940&r1=33939&r2=33940&view=diff
==============================================================================
--- trunk/reactos/include/reactos/armddk.h [iso-8859-1] (original)
+++ trunk/reactos/include/reactos/armddk.h [iso-8859-1] Wed Jun 11 23:32:45 2008
@@ -111,6 +111,8 @@
     PVOID InitialStack;
     PVOID StackLimit;
     ULONG QuantumEnd;
+    PVOID PerfGlobalGroupMask;
+    ULONG ContextSwitches;
 } KPCR, *PKPCR;
 
 //

Modified: trunk/reactos/ntoskrnl/ex/init.c
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ex/init.c?rev=33940&r1=33939&r2=33940&view=diff
==============================================================================
--- trunk/reactos/ntoskrnl/ex/init.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/ex/init.c [iso-8859-1] Wed Jun 11 23:32:45 2008
@@ -1269,7 +1269,7 @@
     DPRINT1("*** Phase 1 Initialization Thread\n");
     DPRINT1("Beginning consistency checks...\n");
     // CHECK STACKS, IRQLS, DISPATCHER AND MAKE SURE WE ARE GOOD TO GO!
-    while (TRUE);
+    //while (TRUE);
 #endif
 
     /* Allocate the initialization buffer */

Modified: trunk/reactos/ntoskrnl/ke/arm/trapc.c
URL: http://svn.reactos.org/svn/reactos/trunk/reactos/ntoskrnl/ke/arm/trapc.c?rev=33940&r1=33939&r2=33940&view=diff
==============================================================================
--- trunk/reactos/ntoskrnl/ke/arm/trapc.c [iso-8859-1] (original)
+++ trunk/reactos/ntoskrnl/ke/arm/trapc.c [iso-8859-1] Wed Jun 11 23:32:45 2008
@@ -33,11 +33,14 @@
 VOID FASTCALL
 HalClearSoftwareInterrupt(IN KIRQL Request);
 
-VOID
+BOOLEAN
 KiSwapContextInternal(IN PKTHREAD OldThread,
                       IN PKTHREAD NewThread)
 {
     PKEXCEPTION_FRAME ExFrame = NewThread->KernelStack;
+    PKPCR Pcr = (PKPCR)KeGetPcr();
+    PKPRCB Prcb = Pcr->Prcb;
+    PKPROCESS OldProcess, NewProcess;
     DPRINT1("Switching from: %p to %p\n", OldThread, NewThread);
     DPRINT1("Stacks: %p %p\n", OldThread->KernelStack, NewThread->KernelStack);
     DPRINT1("Thread Registers:\n"
@@ -61,10 +64,91 @@
             ExFrame->R11,
             ExFrame->Psr,
             ExFrame->Lr);
-    
-    //
-    // FIXME: Todo
-    //
+    DPRINT1("Old priority: %lx\n", OldThread->Priority);
+    
+    //
+    // Increase context switch count
+    //
+    Pcr->ContextSwitches++;
+    
+    //
+    // Check if WMI tracing is enabled
+    //
+    if (Pcr->PerfGlobalGroupMask)
+    {
+        //
+        // FIXME: TODO
+        //
+        DPRINT1("WMI Tracing not supported\n");
+        while (TRUE);
+    }
+    
+    //
+    // Check if the processes are also different
+    //
+    OldProcess = OldThread->ApcState.Process;
+    NewProcess = NewThread->ApcState.Process;
+    if (OldProcess != NewProcess)
+    {
+        //
+        // Check if address space switch is needed
+        //
+        if (OldProcess->DirectoryTableBase.LowPart !=
+            NewProcess->DirectoryTableBase.LowPart)
+        {
+            //
+            // FIXME: TODO
+            //
+            DPRINT1("Address space switch not implemented\n");
+            while (TRUE);
+        }
+    }
+    
+    //
+    // Increase thread context switches
+    //
+    NewThread->ContextSwitches++;
+    
+    //
+    // Set us as the current thread
+    // NOTE: On RISC Platforms, there is both a KPCR CurrentThread, and a
+    // KPRCB CurrentThread.
+    // The latter is set just like on x86-based builds, the former is only set
+    // when actually doing the context switch (here).
+    // Recall that the reason for the latter is due to the fact that the KPCR
+    // is shared with user-mode (read-only), so that information is exposed
+    // there as well.
+    //
+    Pcr->CurrentThread = NewThread;
+    
+    //
+    // DPCs shouldn't be active
+    //
+    if (Prcb->DpcRoutineActive)
+    {
+        //
+        // FIXME: FAIL
+        //
+        DPRINT1("DPCS ACTIVE!!!\n");
+        while (TRUE);
+    }
+    
+    //
+    // Kernel APCs may be pending
+    //
+    if (NewThread->ApcState.KernelApcPending)
+    {
+        //
+        // FIXME: TODO
+        //
+        DPRINT1("APCs pending!\n");
+        while (TRUE);
+    }
+    
+    //
+    // Return
+    //
+    return FALSE;
 }
 
 VOID



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