[ros-diffs] [tkreuzer] 44258: - MmArmAccessFault: Don't assume that PDE's are accessible, instead use MiIsPdeForAddressValid - Use HYPER_SPACE_END / MI_PFN_DATABASE constants instead of hardcoded values - Remove the MmAccessFault hack, it works now.
tkreuzer at svn.reactos.org
tkreuzer at svn.reactos.org
Sat Nov 21 16:52:29 CET 2009
Author: tkreuzer
Date: Sat Nov 21 16:52:28 2009
New Revision: 44258
URL: http://svn.reactos.org/svn/reactos?rev=44258&view=rev
Log:
- MmArmAccessFault: Don't assume that PDE's are accessible, instead use MiIsPdeForAddressValid
- Use HYPER_SPACE_END / MI_PFN_DATABASE constants instead of hardcoded values
- Remove the MmAccessFault hack, it works now.
Modified:
branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/amd64/mm.h
branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/i386/mm.h
branches/ros-amd64-bringup/reactos/ntoskrnl/ke/amd64/trap.S
branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/pagfault.c
branches/ros-amd64-bringup/reactos/ntoskrnl/mm/amd64/init.c
Modified: branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/amd64/mm.h
URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/amd64/mm.h?rev=44258&r1=44257&r2=44258&view=diff
==============================================================================
--- branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/amd64/mm.h [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/amd64/mm.h [iso-8859-1] Sat Nov 21 16:52:28 2009
@@ -18,6 +18,7 @@
#define MI_SYSTEM_PTE_START (PVOID)0xFFFFFAA000000000ULL
#define MI_PAGED_POOL_START (PVOID)0xFFFFFA8000000000ULL
#define MI_NON_PAGED_SYSTEM_START_MIN 0xFFFFFAA000000000ULL
+#define MI_PFN_DATABASE (PVOID)0xFFFFFAC000000000ULL
#define MI_NONPAGED_POOL_END (PVOID)0xFFFFFAE000000000ULL
#define MI_DEBUG_MAPPING (PVOID)0xFFFFFFFF80000000ULL // FIXME
#define MI_HIGHEST_SYSTEM_ADDRESS (PVOID)0xFFFFFFFFFFFFFFFFULL
@@ -78,6 +79,15 @@
Temp <<= 25;
Temp >>= 16;
return (PVOID)Temp;
+}
+
+BOOLEAN
+FORCEINLINE
+MiIsPdeForAddressValid(PVOID Address)
+{
+ return ((MiAddressToPxe(Address)->u.Hard.Valid) &&
+ (MiAddressToPpe(Address)->u.Hard.Valid) &&
+ (MiAddressToPde(Address)->u.Hard.Valid));
}
//#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
Modified: branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/i386/mm.h
URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/i386/mm.h?rev=44258&r1=44257&r2=44258&view=diff
==============================================================================
--- branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/i386/mm.h [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/ntoskrnl/include/internal/i386/mm.h [iso-8859-1] Sat Nov 21 16:52:28 2009
@@ -34,6 +34,7 @@
// Convert a PTE into a corresponding address
//
#define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10))
+#define MiIsPdeForAddressValid(Pde) (MiAddressToPde(Address)->u.Hard.Valid)
#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
#define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE)))
Modified: branches/ros-amd64-bringup/reactos/ntoskrnl/ke/amd64/trap.S
URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/ntoskrnl/ke/amd64/trap.S?rev=44258&r1=44257&r2=44258&view=diff
==============================================================================
--- branches/ros-amd64-bringup/reactos/ntoskrnl/ke/amd64/trap.S [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/ntoskrnl/ke/amd64/trap.S [iso-8859-1] Sat Nov 21 16:52:28 2009
@@ -544,10 +544,7 @@
mov r8b, [rbp + KTRAP_FRAME_SegCs] // Mode
and r8b, 1
mov r9, rbp // TrapInformation
-// call _MmAccessFault
-
- // HACK
- mov eax, STATUS_ACCESS_VIOLATION
+ call _MmAccessFault
/* Check for success */
test eax, eax
Modified: branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/pagfault.c
URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/pagfault.c?rev=44258&r1=44257&r2=44258&view=diff
==============================================================================
--- branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/pagfault.c [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/pagfault.c [iso-8859-1] Sat Nov 21 16:52:28 2009
@@ -200,7 +200,7 @@
IN PVOID TrapInformation)
{
KIRQL OldIrql = KeGetCurrentIrql(), LockIrql;
- PMMPTE PointerPde, PointerPte;
+ PMMPTE PointerPte;
MMPTE TempPte;
PETHREAD CurrentThread;
NTSTATUS Status;
@@ -210,7 +210,6 @@
// Get the PTE and PDE
//
PointerPte = MiAddressToPte(Address);
- PointerPde = MiAddressToPde(Address);
//
// Check for dispatch-level snafu
@@ -239,7 +238,7 @@
//
// Is the PDE valid?
//
- if (!PointerPde->u.Hard.Valid == 0)
+ if (!MiIsPdeForAddressValid(Address))
{
//
// Debug spew (eww!)
@@ -254,7 +253,7 @@
//
// Now we SHOULD be good
//
- if (PointerPde->u.Hard.Valid == 0)
+ if (!MiIsPdeForAddressValid(Address))
{
//
// FIXFIX: Do the S-LIST hack
@@ -297,9 +296,8 @@
//
// Check for a fault on the page table or hyperspace itself
- // FIXME: Use MmHyperSpaceEnd
- //
- if ((Address >= (PVOID)PTE_BASE) && (Address <= (PVOID)0xC0800000))
+ //
+ if ((Address >= (PVOID)PTE_BASE) && (Address <= (PVOID)HYPER_SPACE_END))
{
//
// This might happen...not sure yet
Modified: branches/ros-amd64-bringup/reactos/ntoskrnl/mm/amd64/init.c
URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/ntoskrnl/mm/amd64/init.c?rev=44258&r1=44257&r2=44258&view=diff
==============================================================================
--- branches/ros-amd64-bringup/reactos/ntoskrnl/mm/amd64/init.c [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/ntoskrnl/mm/amd64/init.c [iso-8859-1] Sat Nov 21 16:52:28 2009
@@ -242,6 +242,7 @@
}
VOID
+NTAPI
MxMapPage(PVOID Address)
{
MMPTE TmplPte, *Pte;
@@ -286,8 +287,8 @@
MxPfnSizeInBytes = ROUND_TO_PAGES((MmHighestPhysicalPage + 1) * sizeof(MMPFN));
MxPfnAllocation = MxPfnSizeInBytes >> PAGE_SHIFT;
- /* Sinply start at hardcoded address */
- MmPfnDatabase = (PVOID)0xFFFFFAC000000000ULL;
+ /* Simply start at hardcoded address */
+ MmPfnDatabase = MI_PFN_DATABASE;
/* Loop the memory descriptors */
for (ListEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
@@ -363,8 +364,7 @@
MiInitializePageTable()
{
ULONG64 PageFrameOffset;
- PMMPTE Pte, StartPte, EndPte;
- MMPTE TmplPte;
+ MMPTE TmplPte, *Pte;
PFN_NUMBER PageCount;
/* HACK: don't use freeldr debug print anymore */
@@ -382,12 +382,10 @@
__writecr4(__readcr4() | CR4_PGE);
ASSERT(__readcr4() & CR4_PGE);
- /* Set user mode address range */
- StartPte = MiAddressToPxe(0);
- EndPte = MiAddressToPxe(MmHighestUserAddress);
-
/* Loop the user mode PXEs */
- for (Pte = StartPte; Pte <= EndPte; Pte++)
+ for (Pte = MiAddressToPxe(0);
+ Pte <= MiAddressToPxe(MmHighestUserAddress);
+ Pte++)
{
/* Zero the PXE, clear all mappings */
Pte->u.Long = 0;
@@ -405,12 +403,10 @@
/* Create PDPTs (72 KB) for shared system address space,
* skip page tables and hyperspace */
- /* Set the range */
- StartPte = MiAddressToPxe((PVOID)(HYPER_SPACE_END + 1));
- EndPte = MiAddressToPxe(MI_HIGHEST_SYSTEM_ADDRESS);
-
/* Loop the PXEs */
- for (Pte = StartPte; Pte <= EndPte; Pte++)
+ for (Pte = MiAddressToPxe((PVOID)(HYPER_SPACE_END + 1));
+ Pte <= MiAddressToPxe(MI_HIGHEST_SYSTEM_ADDRESS);
+ Pte++)
{
/* Is the PXE already valid? */
if (!Pte->u.Hard.Valid)
@@ -764,7 +760,6 @@
ExAllocatePoolWithTag(NonPagedPool, Size, ' mM');
ASSERT(MmPagedPoolInfo.PagedPoolAllocationMap);
- DPRINT1("BitMapSize = 0x%lx, Size = 0x%lx\n", BitMapSize, Size);
// Initialize it such that at first, only the first page's worth of PTEs is
// marked as allocated (incidentially, the first PDE we allocated earlier).
RtlInitializeBitMap(MmPagedPoolInfo.PagedPoolAllocationMap,
@@ -781,9 +776,6 @@
ExAllocatePoolWithTag(NonPagedPool, Size, ' mM');
ASSERT(MmPagedPoolInfo.EndOfPagedPoolBitmap);
- DPRINT1("PagedPoolAllocationMap=%p, EndOfPagedPoolBitmap=%p\n",
- MmPagedPoolInfo.PagedPoolAllocationMap, MmPagedPoolInfo.EndOfPagedPoolBitmap);
-
/* Initialize the bitmap */
RtlInitializeBitMap(MmPagedPoolInfo.EndOfPagedPoolBitmap,
(PULONG)(MmPagedPoolInfo.EndOfPagedPoolBitmap + 1),
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