[ros-bugs] [Bug 3772] InterlockedBitTestAndSet() bug

ReactOS.Bugzilla at www.reactos.org ReactOS.Bugzilla at www.reactos.org
Wed Nov 5 13:54:39 CET 2008


http://www.reactos.org/bugzilla/show_bug.cgi?id=3772





--- Comment #6 from hto <hto at dev.null>  2008-11-05 13:54:38 CET ---
Created an attachment (id=3216)
 --> (http://www.reactos.org/bugzilla/attachment.cgi?id=3216)
Patch

- fix an issue with choosing nonexistent x86 registers %sil/%dil, see
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=10153 for more details,
- add "memory" to _InterlockedAddLargeStatistic(). "In Visual C++ 2005, this
function behaves as a read-write barrier." -- MSDN library,
- use "+m" instead of "=m".


P.S.: Could someone check "bizarre implementation which follows Visual C++" of
_bittestandcomplement, _bittestandreset, and _bittestandset in intrin_x86.h?
There should be:

  __asm__("blah" : [retval] "=q" (retval), [a] "+mr" (*a) : [b] "r" (b));

instead of:

  __asm__("blah" : [retval] "=q" (retval) : [a] "mr" (*a), [b] "r" (b));

i think?


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