[ros-diffs] [tkreuzer] 48368: [NTOS] Move more code out of the platform specific file.

[tkreuzer at svn.reactos.org]

Author: tkreuzer
Date: Thu Jul 29 21:09:04 2010
New Revision: 48368

URL: http://svn.reactos.org/svn/reactos?rev=48368&view=rev
Log:
[NTOS]
Move more code out of the platform specific file.

Modified:
    branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/i386/init.c
    branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/mminit.c

Modified: branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/i386/init.c
URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/i386/init.c?rev=48368&r1=48367&r2=48368&view=diff
==============================================================================
--- branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/i386/init.c [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/i386/init.c [iso-8859-1] Thu Jul 29 21:09:04 2010
@@ -150,8 +150,6 @@
     PMMPTE StartPde, EndPde, PointerPte, LastPte;
     MMPTE TempPde, TempPte;
     PVOID NonPagedPoolExpansionVa;
-    ULONG OldCount;
-    KIRQL OldIrql;
 
     /* Check for global bit */
 #if 0
@@ -329,6 +327,12 @@
     MmNonPagedPoolExpansionStart = NonPagedPoolExpansionVa;
 
     //
+    // Sanity check: make sure we have properly defined the system PTE space
+    //
+    ASSERT(MiAddressToPte(MmNonPagedSystemStart) <
+           MiAddressToPte(MmNonPagedPoolExpansionStart));
+    
+    //
     // Last step is to actually map the nonpaged pool
     //
     PointerPte = MiAddressToPte(MmNonPagedPoolStart);
@@ -344,83 +348,30 @@
     }
     
     //
-    // Sanity check: make sure we have properly defined the system PTE space
-    //
-    ASSERT(MiAddressToPte(MmNonPagedSystemStart) <
-           MiAddressToPte(MmNonPagedPoolExpansionStart));
-    
-    /* Now go ahead and initialize the nonpaged pool */
-    MiInitializeNonPagedPool();
-    MiInitializeNonPagedPoolThresholds();
-
-    /* Build the PFN Database */
-    MiInitializePfnDatabase(LoaderBlock);
-    MmInitializeBalancer(MmAvailablePages, 0);
-
-    //
-    // Initialize the nonpaged pool
-    //
-    InitializePool(NonPagedPool, 0);
-    
-    //
     // We PDE-aligned the nonpaged system start VA, so haul some extra PTEs!
     //
     PointerPte = MiAddressToPte(MmNonPagedSystemStart);
-    OldCount = MmNumberOfSystemPtes;
     MmNumberOfSystemPtes = MiAddressToPte(MmNonPagedPoolExpansionStart) -
                            PointerPte;
     MmNumberOfSystemPtes--;
     DPRINT("Final System PTE count: %d (%d bytes)\n",
            MmNumberOfSystemPtes, MmNumberOfSystemPtes * PAGE_SIZE);
     
-    //
-    // Create the system PTE space
-    //
-    MiInitializeSystemPtes(PointerPte, MmNumberOfSystemPtes, SystemPteSpace);
-    
     /* Get the PDE For hyperspace */
     StartPde = MiAddressToPde(HYPER_SPACE);
     
-    /* Lock PFN database */
-    OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
-    
     /* Allocate a page for hyperspace and create it */
-    PageFrameIndex = MiRemoveAnyPage(0);
-    TempPde.u.Hard.PageFrameNumber = PageFrameIndex;
+    TempPde.u.Hard.PageFrameNumber = MiEarlyAllocPages(1);
     TempPde.u.Hard.Global = FALSE; // Hyperspace is local!
     MI_WRITE_VALID_PTE(StartPde, TempPde);
     
     /* Flush the TLB */
     KeFlushCurrentTb();
     
-    /* Release the lock */
-    KeReleaseQueuedSpinLock(LockQueuePfnLock, OldIrql);
-    
-    //
-    // Zero out the page table now
-    //
+    /* Zero out the page table now */
     PointerPte = MiAddressToPte(HYPER_SPACE);
     RtlZeroMemory(PointerPte, PAGE_SIZE);
-    
-    //
-    // Setup the mapping PTEs
-    //
-    MmFirstReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_START);
-    MmLastReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_END);
-    MmFirstReservedMappingPte->u.Hard.PageFrameNumber = MI_HYPERSPACE_PTES;
-
-    //
-    // Reserve system PTEs for zeroing PTEs and clear them
-    //
-    MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES,
-                                                    SystemPteSpace);
-    RtlZeroMemory(MiFirstReservedZeroingPte, MI_ZERO_PTES * sizeof(MMPTE));
-    
-    //
-    // Set the counter to maximum to boot with
-    //
-    MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES - 1;
-    
+        
     return STATUS_SUCCESS;
 }
 

Modified: branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/mminit.c
URL: http://svn.reactos.org/svn/reactos/branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/mminit.c?rev=48368&r1=48367&r2=48368&view=diff
==============================================================================
--- branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/mminit.c [iso-8859-1] (original)
+++ branches/ros-amd64-bringup/reactos/ntoskrnl/mm/ARM3/mminit.c [iso-8859-1] Thu Jul 29 21:09:04 2010
@@ -1887,7 +1887,36 @@
 
         /* Initialize the platform-specific parts */       
         MiInitMachineDependent(LoaderBlock);
-        
+
+        /* Now go ahead and initialize the nonpaged pool */
+        MiInitializeNonPagedPool();
+        MiInitializeNonPagedPoolThresholds();
+
+        /* Build the PFN Database */
+        MiInitializePfnDatabase(LoaderBlock);
+        MmInitializeBalancer(MmAvailablePages, 0);
+
+        /* Initialize the nonpaged pool */
+        InitializePool(NonPagedPool, 0);
+        
+        /* Create the system PTE space */
+        MiInitializeSystemPtes(MiAddressToPte(MmNonPagedSystemStart),
+                               MmNumberOfSystemPtes,
+                               SystemPteSpace);
+        
+        /* Setup the mapping PTEs */
+        MmFirstReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_START);
+        MmLastReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_END);
+        MmFirstReservedMappingPte->u.Hard.PageFrameNumber = MI_HYPERSPACE_PTES;
+
+        /* Reserve system PTEs for zeroing PTEs and clear them */
+        MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES,
+                                                        SystemPteSpace);
+        RtlZeroMemory(MiFirstReservedZeroingPte, MI_ZERO_PTES * sizeof(MMPTE));
+        
+        /* Set the counter to maximum to boot with */
+        MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES - 1;
+
         //
         // Sync us up with ReactOS Mm
         //