[ros-kernel] TEB offsets wrong - suggested fix - feedback pls

Royce Mitchell III royce3 at ev1.net
Wed Feb 4 21:32:03 CET 2004


Hey guys,

The TEB needs some work...

Here's a snippet illustrating the problem:

   PVOID UserReserved[5];              /* 700h */
   PVOID glDispatchTable[0x118];       /* 714h */
   ULONG glReserved1[0x1A];            /* B74h */

okay, first problem: glDispatchTable starts at offset 7C4, not 714, and 
has 163 (A3h) entries.

second problem: glReserved1 - listed as being offset B74h, *isn't at* 
B74h. 714h + 118h = 82Ch

so, basically, here's my proposed fix:

   PVOID GdiThreadLocaleInfo;          /* 6FCh */
   UCHAR UserReserved[0xC4];           /* 700h */
   PVOID glDispatchTable[0xA3];        /* 7C4h */
   PVOID glReserved1[0xA3];            /* A50h */
   PVOID glReserved2;                  /* BDCh */

Caveat, I haven't checked *any* of the other offsets in the struct.

I'm convinced my patch is correct, but I'm afraid to make such a 
all-encompassing change without some feedback.

Thanks,

Royce3



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